Advances in semiconductor processing and logic design have permitted an increase in the amount of logic that may be present on integrated circuit devices. As a result, computer system configurations have evolved from a single or multiple integrated circuits in a system to multiple hardware threads, multiple cores, multiple devices, and/or complete systems on individual integrated circuits. Additionally, as the density of integrated circuits has grown, the power requirements for computing systems (from embedded systems to servers) have also escalated. Furthermore, software inefficiencies, and its requirements of hardware, have also caused an increase in computing device energy consumption. In fact, some studies indicate that computing devices consume a sizeable percentage of the entire electricity supply for a country, such as the United States of America. As a result, there is a vital need for energy efficiency and conservation associated with integrated circuits. These needs will increase as servers, desktop computers, notebooks, Ultrabooks™, tablets, mobile phones, processors, embedded systems, etc. become even more prevalent (from inclusion in the typical computer, automobiles, and televisions to biotechnology).
For semiconductors such as processors, maximum frequency or performance is usually limited by either a thermal design power (TDP) or by gate oxide reliability. With multicore processors, maximum frequency or performance tends to be power limited when all cores are active, and tends to be limited by gate oxide reliability with a single core running. In general a multicore processor has a fixed core operating voltage, determined based on a usage model. Gate oxide failure rate tends to be much less than a gate oxide failure target if a customer operates the processor with only a single core active. Conversely, the gate oxide failure rate tends to be much larger than the gate oxide failure target if a customer operates the processor with all cores active. Thus in the second scenario, a gate oxide failure rate exceeds a target rate. And in the first scenario, performance is lost as operating voltage in a single core scenario is not optimized.